NVIDIA’s Vera CPU Exposes Linux Scheduler Flaws in SMT and Asymmetric Capacity

NVIDIA’s push into custom Arm server silicon hit an unexpected snag. Its new Vera CPU, built around 88 Olympus cores and designed for the demands of agentic AI, revealed a blind spot in the Linux kernel’s handling of simultaneous multithreading combined with slight capacity differences.

The result? Up to a 2x performance drop on CPU-intensive workloads. But engineers didn’t stop at diagnosis. They proposed targeted fixes. And those changes now promise better behavior not just for Vera but for any future platform that mixes SMT with asymmetric topologies.

The Vera Platform and Its Spatial Multithreading Approach

Vera pairs its custom Olympus cores with massive memory bandwidth and a second-generation Scalable Coherency Fabric. The design targets AI factories where single-thread performance matters as much as concurrent throughput. Each Olympus core supports NVIDIA Spatial Multithreading, a statically partitioned alternative to traditional SMT.

This approach reduces thread-to-thread interference. It delivers more consistent latency under load. NVIDIA claims up to 50% faster sandbox performance compared with competitive platforms on agentic workloads, along with 1.2 TB/s of memory bandwidth. (NVIDIA Technical Blog, March 16, 2026)

Yet real-world testing on the Vera Rubin platform uncovered problems. When SMT is enabled, the firmware exposes small frequency variations of roughly plus or minus 5% as differences in CPU capacity. That triggers the kernel’s SD_ASYM_CPUCAPACITY scheduling domain.

Without adjustments, the idle selection policy fails to account for busy SMT siblings. The scheduler can place new work on a partially occupied core instead of a fully idle one. Performance collapses. In some CPU-bound cases, throughput falls by half.

NVIDIA Linux engineer Andrea Righi documented the issue clearly. “This patch set has been tested on the new NVIDIA Vera Rubin platform, where SMT is enabled and the firmware exposes small frequency variations (+/-~5%) as differences in CPU capacity, resulting in SD_ASYM_CPUCAPACITY being set,” he wrote in the cover letter. “Without these patches, performance can drop up to ~2x with CPU-intensive workloads, because the SD_ASYM_CPUCAPACITY idle selection policy does not account for busy SMT siblings.” (Phoronix, March 27, 2026)

Righi and his team evaluated other options. They considered equalizing capacities through firmware changes via ACPI/CPPC. Or normalizing values inside the kernel by grouping CPUs within a small capacity window. Or simply enabling asymmetric packing. None matched the results of adding proper SMT awareness to the existing asymmetric capacity logic.

The chosen path prefers fully idle cores. It stops treating a partially idle SMT sibling as a full-capacity target. Simple in concept. Complex in execution across the scheduler’s many decision paths.

By late August 2026, NVIDIA returned with additional patches. These further tune SMT behavior on Vera. They introduce SD_ASYM_PACKING domain creation and adjust idle selection to honor asymmetric SMT priority. One series prefers the primary execution unit, often called PE0, as the sibling. Benchmarks on an 88-thread GEMM workload showed throughput climbing from about 9.4 TFLOP/s to 10.1 TFLOP/s. Run-to-run variation dropped too. (Phoronix, August 31, 2026)

The improvements build on earlier work. A commit merged in Linux 7.3 addressed NOHZ balancing and already lifted performance to 9.2 TFLOP/s on similar tests. Consistency matters here. Agentic AI workloads hate unpredictable tail latency. Vera’s entire pitch rests on determinism under heavy concurrent load.

But the story runs deeper than one platform. Righi’s original message noted that the policy change “also seems worthwhile in general, as other platforms in the future may enable SMT with asymmetric CPU topologies.” The kernel has long supported asymmetric capacity for big.LITTLE designs. SMT adds another axis of complexity. Threads on the same core share resources yet present different effective capacities when frequency scaling or other variations appear.

Server operators running dense AI inference or reinforcement learning training notice these effects immediately. Place a latency-sensitive agent thread next to a memory-bandwidth hog on the same physical core and predictability vanishes. Vera’s spatial multithreading tries to mitigate that at the hardware level through partitioning. The scheduler must still make smart placement decisions.

Recent upstream activity shows the fixes gaining traction. Several scheduler patches for Vera, including those handling RCU usage during CPU offline and SMT contention, appear in NVIDIA’s platform software guide. Some have landed in Linux 7.2 or later. Others remain under review. The company continues to ship patches for its Base OS, a modified Ubuntu, while pushing changes to mainline. (NVIDIA Patches Configuration Guide)

At Hot Chips in August 2026, NVIDIA detailed the Olympus architecture further. The cores feature a 10-wide decode front-end, neural branch predictor, and deep out-of-order execution. Spatial multithreading lets users choose between maximum per-thread performance and higher thread count at runtime. When one thread idles, the sibling does not immediately reclaim all resources. That delay, combined with scheduler decisions, created the original performance cliff.

The patches address exactly that interaction. They stabilize idle-core selection so concurrent wakeups favor the same SMT-core representative. One Ubuntu bug report tied to this work reported a 23% throughput increase on an NVPL SGEMM workload limited to one thread per core. (Launchpad Bug #2158811)

So what does this mean for data center operators evaluating Vera against AMD or Intel alternatives? The hardware delivers strong per-core performance and high bandwidth. Yet its success in production depends on mature software support. Linux kernel developers have responded. The scheduler now better understands the realities of NVIDIA’s custom SMT implementation.

Still, the episode highlights a broader truth. Custom silicon brings custom scheduling challenges. Frequency variations that look tiny on paper can trigger entirely different code paths in the kernel. A 5% capacity delta, when combined with SMT siblings, proved enough to halve throughput until the right logic landed.

NVIDIA continues to upstream more Vera enablement. Compiler support for Olympus scheduling models arrived in LLVM 22. Performance tools and errata fixes keep flowing. The company positions Vera as the host processor for Vera Rubin NVL72 systems, pairing tightly with GPUs over NVLink-C2C.

That integration demands the CPU handle orchestration and data movement without becoming a bottleneck. Predictable CPU performance under load matters. The scheduler patches help deliver on that promise.

Watch the Linux 7.3 and 7.4 merge windows. More of these SMT-aware asymmetric capacity changes could land. Their effect will stretch beyond NVIDIA’s servers. Any Arm platform that ships SMT with even modest frequency asymmetry stands to benefit.

The Vera story shows how hardware innovation forces software evolution. NVIDIA found the flaw early. Its engineers fixed it in public. The result looks like a stronger Linux scheduler for everyone involved.